In its broadest sense, this invention is directed to a method of forming high quality, patterned deposits upon semiconductor devices through the use of a non-destructive electro-coating process, and has particular utility in the manufacture of photovoltaic devices. In the fabrication of relatively large area photovoltaic devices, it is often desirable to include a relatively high conductivity metallic grid pattern upon the light incident surface of the device. This grid pattern provides a low resistance current path for the collection of photogenerated current, thereby decreasing the internal resistance of the photovoltaic device and increasing its efficiency. Such a grid pattern can be deposited by the method steps of the instant invention.
Many other semiconductor devices also require the deposition of a patterned layer of electrically insulating or electrically conducting material thereupon as one step in the fabrication thereof, said patterned layer of material thereby defining electrically conductive or electrically insulating regions upon the semiconductor device. For example, many semiconductor devices incorporate electrically insulating regions upon a surface thereof in order to prevent short circuiting of the device at points of contact with other devices, support members, associated circuitry, etc. More particularly, and as is well known to those skilled in the art of MOS transistor fabrication and design, an electrically insulating oxide must be provided atop the semiconductor layer so as to insulate that layer from the gate electrode. The insulating oxide may be efficiently and cost effectively deposited by the novel method described herein.
It is also desirable in many instances to include a pattern of electrically conductive regions upon a surface of a semiconductor device. Such conductive regions may be used to interconnect various circuit elements so as to form integrated circuitry. In other cases, a pattern of electrically conductive regions may be formed upon a semiconductor device to provide contact points for electrically connecting the device to other devices or circuitry. As a still further example of the use of the method of the instant invention, photovoltaic devices may include a metallic layer on the rear surface thereof for use as a back reflector. In such photovoltaic devices, the reflective layer is disposed at the back surface (i.e., distal from the surface upon which light is incident), and functions to redirect light which has made a first pass through the active regions thereof through those active regions, thereby increasing overall device efficiency. Both the patterns of electrically conductive regions and the back reflector layer may be effectively deposited pursuant to the concepts discussed herein.
In summation and as is readily apparent from the foregoing discussion, it is desirable to provide a pattern of electrically insulating material and/or electrically conducting material upon a surface of semiconductor devices. The instant invention provides an improved method for electro-coating such patterns without harming the semiconductor device. In view of the number of diverse functions and geometries of the patterns formed upon semiconductor devices, the terms "pattern" or "electro-coated region", as used herein, are defined to include coated regions of all sizes, configurations and thicknesses; including, but not limited to continuous layers, discontinuous layers, stripes, grids, networks, etc., which are deposited upon a surface of the semiconductor device. The foregoing definitions are not limited by the function of the deposited pattern, but, rather include patterns which function as electrical conductors, thermal conductors, light reflectors, heat reflectors, electrical insulators, anti-reflective layers, decorative trim, etc.
The methods heretofore used to deposit patterned regions upon a surface of a semiconductor device have proven less than satisfactory. Vacuum coating processes such as sputtering, evaporation, or ion-plating represent one prior art method of providing such patterned regions. However, vacuum coating processes have inherent limitations which render them undesirable. More particularly, vacuum coating processes (1) require a vacuum, thereby utilizing relatively expensive and complicated equipment; (2) are time consuming; and (3) require skilled operators. Additionally, vacuum coating process deposit continuous layers which must be etched, scribed or otherwise formed into the desired pattern is a subsequent processing step.
In other prior art methods the patterned regions are applied upon a surface of a semiconductor device in a printing process. Materials such as (1) electrically conductive or electrically insulating ink may be applied to the surface of a semiconductor device by an offset type printing process, or (2) electrically conductive or electrically insulating paste may be applied to the device through a stenciling or screen printing process. These deposition techniques, while inexpensive, result in the application of materials having limited utility in semiconductor devices, since they incorporate organic binders which either contaminate the electronic device produced therefrom, or interfere with further processing steps. Also, resolution of the printing processes used to deposit these inks and pastes is generally insufficient to apply the finely detailed patterns which are often necessary for microelectronic devices. The aforementioned materials, generally have relatively low electrical conductivities and therefore must be applied in thick layers in order to provide adequate electrical performance. Since thick layers are not compatible with thin film semiconductor layers, printing processes are of limited use in the manufacture of thin film semiconductor devices. Additionally, the inks used in these printing processes must generally be cured at relatively high temperatures if optimum stability and performance is to be obtained, and such elevated temperatures are incompatibile with many semiconductor materials. Furthermore, (1) it is difficult to provide soldered joints to such organic binder-containing materials, and (2) reliability and serviceability of such relatively thick patterned regions is inadequate, since they are subject to mechanical damage and are degraded by ultraviolet radiation.
A further variation of the aforementioned prior art printing process, said variation limited to the production of electrically conductive patterns only, involves the use of metal resinates. These commercially available materials comprise metallic atoms complexed with an organic material. In use, the resinates are (1) applied to the substrate in a desired pattern, and (2) fired at high temperatures so as to volatize the organic material, thereby leaving a residue layer of metal which forms the electrically conductive patterned regions. While the metallic layer thus deposited provides sufficient electrical conductance for many of the purposes discussed hereinabove, the high cost of the metal resinates, the time consuming nature of the process, and the high temperatures required to volatize the organic material severely limit the use of this technique. For example, even disregarding cost, the metal resinate technique could not be utilized to form contacts or grid patterns on thin film amorphous photovoltaic devices, since the high processing temperatures (300.degree.-600.degree. C.) would crystallize the amorphous semiconductor layers. Further, and obviously, metal resinates could not be used to form electrically insulating patterns. Accordingly, they are of little use in the fabrication of semiconductor devices.
Electroless, or autocatalytic, plating represents a partial solution to the problems associated with the deposition of electrically conductive patterns, such as metallic contacts, upon semiconductor devices. However, such a plating technique has no utility in the deposition of electrically insulating patterns. In electroless plating, (1) the member to be metallized is treated with an appropriate activating material for catalyzing the precipitation of a metallic deposit thereon, and (2) is then immersed in a plating bath in which the deposition of a metal occurs. Under ideal conditions, the metal so deposited is satisfactory, although use of the process is limited by (1) its high costs, (2) the difficulty of implementation, and (3) its restriction to a limited range of metallic deposits. More particularly, the cost of electroless plating is more than an order of magnitude greater than a comparable electroplating process; the parameters of the process must be closely monitored in order to assure the formation of a good electrically conductive coating, and nickel and copper are the only readily available metals that may be deposited by the process. More specifically, if tolerances relating to temperature, concentration, or purity of the activating and plating baths are not closely maintained, the electrically conductive material deposited onto the surface of a semiconductor device will exhibit problems of adhesion, surface quality, durability and composition. For these reasons, electroless plating techniques require the use of highly trained personnel to constantly monitor system parameters.
Electro-coating provides a non-destructive, easily implemented, and economical method of depositing high quality, pure, thin layers of electrically conductive and/or electrically insulating material upon a surface of a semiconductor device. The term "electro-coating", as used herein, shall define a process wherein an electrically charged ion is supplied to the surface of the object upon which material is to be deposited, thereby causing the formation of an electro-coated deposit. Electro-coating includes various electroplating processes wherein an electrical field applied to the surface reduces an ionic species initially in solution causing that species to plate out of the solution and form a deposited layer on the surface being coated. Electro-coating also includes oxidative processes such as anodization, wherein the electrical field applied to the surface being coated causes the surface to react chemically with oxygen ions in contact therewith so as to deposit an oxide layer upon the charged surface. Electro-coating also includes other oxidative processes, whereby the applied field produces deposits of nitrides, sulfides, borides, or similar species upon the object being coated. Electro-coating processes have the advantage of being inexpensive, easy to control and adaptable to the deposition of a wide variety of materials. And since the thickness of an electro-coated deposit is directly proportional to the amount of current utilized, the thickness can be closely controlled. Accordingly, electro-coating techniques are gaining acceptance as a method of depositing electrically conductive layers in the preparation of semiconductor devices. For example, U.S. patent application Ser. No. 524,797 of Prem Nath, et al, filed Aug. 19, 1983 and entitled METHOD OF FORMING AN ELECTRICALLY CONDUCTIVE MEMBER, which application is assigned to the assignee of the instant invention, the disclosure of which is incorporated herein by reference, discloses a method for electroplating an electrically conductive pattern onto a transparent conductive oxide layer of a semiconductor device such as a photovoltaic cell.
The disclosure of Nath, et al recognizes a problem which has heretofore limited the use of electro-coating processes in the fabrication of semiconductor devices. In particular: an electrical current must pass through the material in order to effect the electro-coating; however, the passage of such current through the layers of semiconductor material frequently destroys or severely harms the electrical characteristics of those semiconductor layers. Furthermore, the relatively high electrical resistivities encountered in most common semiconductor materials necessitates that current must flow therethrough at relatively high voltages in order to initiate the coating process, thus further increasing the likelihood of damage to the semiconductor device. As a result, electro-coating processes are of limited utility as applied to semiconductor devices because of the likelihood of damage to the semiconductor devices due to high coating currents and voltages. In response to this problem, Nath, et al specifies that it is desirable to establish electrical contact to the semiconductor device via the surface being plated, thereby eliminating the flow of plating currents through the active semiconductor material of the device. Such contact is practical in Nath, et al since the surface of the semiconductor device being plated has a transparent conductive oxide layer of relatively high electrical conductivity thereupon.
In many cases it is not possible, or not practical to utilize the aforementioned electro-coating method of Nath, et al to make electrical contact to the surface of the semiconductor device being electro-coated. Electrical resistance of semiconductor materials is high, and unless a relatively high electrical conductivity layer, such as the TCO layer of Nath, et al, is included upon the surface of the semiconductor device being electro-coated, lateral resistance of the device to the flow of electrical current will be extremely high. This will result in an inadequate flow of current to those portions of the surface of the device relatively distant from the point at which electrical contact is established, thereby resulting in the deposition of a varying thickness of material across the surface of the semiconductor device. Further, due to the relatively low electrical resistance of the relatively thin layer of semiconductor material in a direction perpendicular to the plane of the surface of the device, the majority of the electro-coating current will flow perpendicularly through the semiconductor material of the device from the point of contact, thereby causing the failure problems previously discussed.
An electro-coating process specifically adapted for use in the preparation of semiconductor devices that is restricted to front-surface contact is of limited utility in the deposition of electrically conductive grid patterns upon large area photovoltaic devices. This is because such large area devices are generally divided into a plurality of electrically isolated photovoltaic segments disposed upon a common electrically conductive substrate. If the electrical current for electro-coating a large area photovoltaic device were to be provided to the front surface of such a device, contact would have to be individually established to each of the plurality of isolated segments since there is no electrical communication therebetween, thus involving a very tedious process. Obviously, it is desirable to establish a single electrical contact through the common substrate which would provide for the electro-coating of the front surface of each of the plurality of electrically isolated segments. According to the prior art methods, such rear-surface contact could not be accomplished without severely damaging the isolated segments.
Accordingly, it can be seen that there exists a need for a method of electro-coating semiconductor devices which will allow electrical current to pass through the semiconductor material of the semiconductor device without damaging same. This need is especially great in the fabrication of large area photovoltaic cells comprising a plurality of discrete, electrically isolated segments which are disposed upon a common, electrically conductive substrate.
Recently, considerable efforts have been made to develop systems for depositing amorphous semiconductor alloy materials, each of which can encompass relatively large areas, and which can be doped to form p-type and n-type materials for the production of p-i-n type photovoltaic devices which are, in operation, substantially equivalent to their crystalline counterparts. It is to be noted that the term "amorphous", as used herein, includes all materials or alloys which have long range disorder, although they may have short or intermediate range order or even contain, at times, crystalline inclusions.
It is now possible to prepare amorphous silicon alloys by glow discharge deposition or vacuum deposition techniques, said alloys possessing (1) acceptable concentrations of localized states in the energy gaps thereof, and (2) high quality electronic properties. Such techniques are fully described in U.S. Pat. No. 4,226,898, entitled Amorphous Semiconductors Equivalent To Crystalline Semiconductors, issued to Stanford R. Ovshinsky and Arun Madan on Oct. 7, 1980; U.S. Pat. No. 4,217,374, of Stanford R. Ovshinsky and Masatsugu Izu, which issued on Aug. 12, 1980, also entitled Amorphous Semiconductors Equivalent To Crystalline Semiconductors; and U.S. patent application Ser. No. 423,424 of Stanford R. Ovshinsky, David D. Allred, Lee Walter, and Stephen J. Hudgens entitled Method of Making Amorphous Semiconductor Alloys and Devices Using Microwave Energy. As disclosed in these patents and application, fluorine introduced into the amorphous silicon semiconductor layers operates to substantially reduce the density of the localized states therein and facilitates the addition of other alloying materials, such as germanium.
The concept of utilizing multiple cells, to enhance photovoltaic device efficiency, was described at least as early as 1955 by E. D. Jackson in U.S. Pat. No. 2,949,498 issued Aug. 16, 1960. The multiple cell structures therein discussed utilized p-n junction crystalline semiconductor devices. Essentially the concept employed different band gap devices to more efficiently collect various portions of the solar spectrum and to increase open circuit voltage (Voc). The tandem cell device (by definition) has two or more cells with the light directed serially through each cell. In the first cell a large band gap material absorbs only the short wavelength light, while in subsequent cells smaller band gap materials absorb the longer wavelengths of light which pass through the first cell. By substantially matching the generated currents from each cell, the overall open circuit voltage is the sum of the open circuit voltage of each cell, while the short circuit current thereof remains substantially constant.
Unlike crystalline silicon which is limited to batch processing for the manufacture of solar cells, amorphous silicon alloys can be deposited in multiple layers over large area substrates to form solar cells in a high volume, continuous processing sytem. Such continuous processing systems are disclosed in U.S. Pat. No. 4,400,409 for A Method Of Making P-Doped Silicon Films and Devices Made Therefrom; and U.S. patent applications: Ser. No. 244,386, filed Mar. 16, 1981, for Continuous Systems For Depositing Amorphous Semiconductor Material; Ser. No. 240,493, filed Mar. 16, 1981, for Continuous Amorphous Solar Cell Production System; Ser. No. 306,146, filed Sept. 28, 1981, for Multiple Chamber Deposition And Isolation System And Method: Ser. No. 359,825, filed Mar. 19, 1982 for Method And Apparatus For Continuously Producing Tandem Amorphous Photovoltaic Cells; and Ser. No. 460,629 filed Jan. 24, 1983 for Method And Apparatus For Continuously Producing Tandem Amorphous Photovoltaic Cells. As disclosed in the above patent and the applications, a substrate may be continuously advanced through a succession of deposition chambers, wherein each chamber is dedicated to the deposition of a specific semiconductor material. In making a photovoltaic device of p-i-n type configurations, the first chamber is dedicated for depositing a p-type semiconductor alloy, the second chamber is dedicated for depositing an intrinsic amorphous semiconductor alloy, and the third chamber is dedicated for depositing an n-type semiconductor alloy.
The layers of semiconductor material thus deposited in the vacuum envelope of the deposition apparatus may be utilized to form a photovoltaic device including one or more p-i-n cells, one or more n-i-p cells, a Schottky barrier, photodiodes, phototransistors, or the like. Additionally, by making multiple passes through the succession of deposition chambers, or by providing an additional array of deposition chambers, multiple stacked cells of various configurations may be obtained.
In many cases, it is necessary to form patterns of electrically conductive or electrically insulating regions such as grids, networks, protective layers, etc. atop the previously deposited amorphous semiconductor material. In other cases, it is desirable to incorporate a reflective metallic back reflector in photovoltaic devices so as to redirect light through the active semiconductor material of the device for a second time. The instant invention may be utilized in the production of all of these devices insofar as it offers a method for economically, and reliably producing said patterns by a process which does not destroy the amorphous semiconductor material of the devices. Accordingly, the instant invention fulfills a long felt need in the production of semiconductor devices in general, and has special significance in the production of amorphous photovoltaic devices.
These and other advantages of the instant invention will become apparent from the drawings, the detailed description of the invention and the claims which follow.